A comparative Study And Evaluation of Improved MAF- PLL Algorithms

mohamed mellouli, Mahmoud Hamouda, Jaleleddine Ben Hadj Slama


The Phase-Locked Loop (PLL) is a synchronization system widely utilized nowadays with the aim to achieve the correct operation of grid-tie PWM converters.  The PLL based on Moving-Average-Filters (MAF-PLL) have recently received considerable attention thanks to their superiority over conventional methods in the case of severe grid disturbances. This paper provides an overview of recent improved MAF-PLL algorithms. A comparative study of the performance of four algorithms is also carried out through experimental tests performed for several types of grid faults. The results clearly show that the performance of each method is widely dependent on the grid fault type.  

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PLL; MAF; grid faults; smart grid; Distributed Power Generation System (DPSGS).

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M. Hamouda, H. F. Blanchette and K. Al-Haddad, "Unity Power Factor Operation of Indirect Matrix Converter Tied to Unbalanced Grid," IEEE Tran. Power Electron., vol. 31, no. 2, pp. 1095-1107, Feb. 2016.

S. Golestan, M. Monfared and F. D. Freijedo, "Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops," IEEE Tran. Power Electron., vol. 28, no. 2, pp. 765-778, Feb. 2013.

L. G. B. Rolim et al., “Analysis and software implementation of a robust synchronizing PLL circuit based on the pq theory,” IEEE Trans. Ind. Electron., vol. 53, no. 6, pp. 1919–1926, Dec. 2006.

D. Yazdani, M. Mojiri, A. Bakhshai, and G. Joos, “A fast and accurate synchronization technique for extraction of symmetrical components,” IEEE Trans. Power Electron., vol. 24, no. 3, pp. 674–684, Mar. 2009.

M. Karimi-Ghartemani, B.-T. Ooi, and A. Bakhshai, “Application of enhanced phase-locked loop system to the computation of synchrophasors,” IEEE Trans. Power Del., vol. 26, no. 1, pp. 22–32, Jan. 2011.

D. O. Abdeslam, D. Flieller, P. Wira and J. Merckle, "Adaline neural networks for online extracting the direct, inverse and homopolar voltage components from a composite voltage," 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005., Raleigh, NC, 2005, pp. 6.

S. Golestan, F. D. Freijedo, A. Vidal, A. G. Yepes, J. M. Guerrero and J. Doval-Gandoy, "An Efficient Implementation of Generalized Delayed Signal Cancellation PLL," IEEE Tran. Power Electron., vol. 31, no. 2, pp. 1085-1094, Feb. 2016.

Y. F. Wang and Y. W. Li, “Grid synchronization PLL based on cascaded delayed signal cancellation,” IEEE Trans. Power Electron., vol. 26, no. 7, pp. 1987–1997, Jul. 2011.

P. Rodriguez, R. Teoderscu, I. Candela, A.V. Timbus, and F. Blaabjerg, "New Positive-sequence Voltage Detector for Grid Synchronization of Power Converters under Faulty Grid Conditions," Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE, 2006, pp. 1-7.

Z. Xin, X. Wang, Z. Qin, M. Lu, P. C. Loh and F. Blaabjerg, "An Improved Second-Order Generalized Integrator Based Quadrature Signal Generator," IEEE Tran. Power Electron., vol. 31, no. 12, pp. 8068-8073, Dec. 2016.

X. Guo, W. Wu, and Z. Chen, “Multiple-complex coefficient-fi-based phase-locked loop and synchronization technique for three-phase gridinterfaced converters in distributed utility networks,” IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1194–1204, Apr. 2011.

P. Rodriguez, A. Luna, I. Etxeberria, J. R. Hermoso, and R. Teodorescu,“Multiple second order generalized integrators for harmonic synchronization of power converters,” in Proc. IEEE Energy Convers. Congr. Expo., Terrassa, Spain, Sep. 20–24, 2009, pp. 2239–2246.

F. A. S. Neves, M. C. Cavalcanti, H. E. P. de Souza, F. Bradaschia, E. J.Bueno, and M. Rizo, “A generalized delayed signal cancellation method for detecting fundamental-frequency positive-sequence three-phase signals,”IEEE Trans. Power Del., vol. 25, no. 3, pp. 1816–1825, Jul. 2010.

P. Xiao, K. A. Corzine, and G. K. Venayagamoorthy, “Multiple reference frame-based control of three-phase PWM boost rectifiers under unbalanced and distorted input conditions,” IEEE Trans. Power Electron.,vol.23, no. 4, pp. 2006–2017, Jul. 2008.

P. Rodriguez, J. Pou, J. Bergas, I. Candela, R. Burgos, and D. Boroyevich, “Decoupled double synchronous reference frame PLL for power converters control,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 584–592, Mar. 2007.

L. Wang, Q. Jiang, L. Hong, C. Zhang, and Y. Wei, “A novel phase locked loop based on frequency detector and initial phase angle detector,” IEEE Trans. Power Electron., vol. 28, no. 10, pp. 4538–4549, Oct. 2013.

M. Mellouli, M. Hamouda, J. B. H. Slama and K. Al-Haddad, "Comparative study between the improved schemes of MAF-based robust PLLs," 2015 International Conference on Sustainable Mobility Applications, Renewables and Technology (SMART), Kuwait City, 2015, pp. 1-6.

F. D. Freijedo, J. Doval-Gandoy, O. Lopez, and E. Acha, “Tuning of phaselocked loops for power converters under distorted utility conditions,” IEEE Trans. Ind. Appl., vol. 45, no. 6, pp. 2039–2047, Dec. 2009.

S. Golestan, M. Ramezani, J. M. Guerrero, F. D. Freijedo and M. Monfared, "Moving Average Filter Based Phase-Locked Loops: Performance Analysis and Design Guidelines," IEEE Tran. Power Electron., vol. 29, no. 6, pp. 2750-2763, June 2014.

Jinyu Wang; Jun Liang; Feng Gao; Li Zhang; Zhuodi Wang, "A Method to Improve the Dynamic Performance of Moving Average Filter-Based PLL," IEEE Trans. Power Electron, vol.30, no.10, pp.5978,5990,Oct.2015.

Golestan, S.; Guerrero, J.M.; Abusorrah, A.M., "MAF-PLL With Phase-Lead Compensator," IEEE Trans. Ind. Electron. , vol.62, no.6, pp.3691,3695, Jun. 2015.

S. Golestan, F. D. Freijedo, A. Vidal, J. M. Guerrero, and J. DovalGandoy, “A quasi-type-1 phase-locked loop structure,” IEEE Trans. Power Electron., vol. 29, no. 12, pp. 6264–6270, Dec. 2014.

S. Golestan, M. Ramezani, J. M. Guerrero, and A.M. Aburssorah, and M. Monfared, “Hybrid Synchronous Stationary Reference-Frame-Filtering-Based PLL,” IEEE Trans. Ind. Electron, vol. 62, no. 8, Aug. 2015.

S. Golestan, J. M. Guerrero, A. Vidal, A. G. Yepes and J. Doval-Gandoy, "PLL With MAF-Based Prefiltering Stage: Small-Signal Modeling and Performance Enhancement," in IEEE Transactions Power Electron., vol. 31, no. 6, pp. 4013-4019, June 2016.

M. S. Reza, M. Ciobotaru and V. G. Agelidis, "A Modified Demodulation Technique for Single-Phase Grid Voltage Fundamental Parameter Estimation," in IEEE Trans. Ind. Electron., vol. 62, no. 6, pp. 3705-3713, June 2015.

L. Zheng, H. Geng and G. Yang, "Improved phase-locked loop under heavily distorted grid condition," Industrial Electronics Society, IECON 2015 - 41st Annual Conference of the IEEE, Yokohama, 2015, pp. 004778-004783.


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